1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and, in particular, to a semiconductor integrated circuit including the device identification-code-information circuit for identifying a device.
2. Description of the Related Art
In a semiconductor integrated circuit, the miniaturization of a package has been advanced more and more with high integration. As the miniaturization of the package, proposals have been offered about a method for mounting a plurality of LSI chips, such as a multi-chip package and a Package on Package. The thickness of the LSI chip used for these packages is made thin, e.g., is ground to 100 μm or less. Upon mounting the miniaturized packages, a problem of the warpage of each package is caused because the thickness of the package is thin, and the mounting condition is extremely severe.
It happens that semiconductor manufacturers or makers shrink LSI chips for reducing costs and also assemble, in the same package, semiconductor integrated circuits with different chip scales and with the same function. In response to a request from a system, the semiconductor manufacturers further tend to assemble, in the same package, pin-compatibility products with different LSI chips and the same function.
Under the circumstances, since the packages are identical with one another, the appearance of such packages is the same as one another. Moreover, the LSI chips of the same functions have the same electrical characteristics because of the same functions. Thus, the products having the shrunk chip and the pin-compatibility product are undistinguishable in appearance and electricity.
However, mounting conditions of the packages with the small size are extremely severe, and optimal mounting conditions are varied upon mounting the LSI chips with different chip scales. If packages of the LSI chips with different chip scales are mixed together to manufacture the Package on Package, the warpage of each package differs depending on the chip scales. Therefore, failure takes place about the package warpage and, as a result, the chips exfoliate or peel from resin at the mounting time. This makes the mounting difficult.
As a consequence, the LSI chip (hereinafter, abbreviated as a device) comprises a device identification-code-information circuit for identifying different devices.
As device identification code information, a wide variety of information is stored which may include a product name, a chip version, a function, and a package number, and etc. By reading the device identification code information, the semiconductor integrated circuits are individually identified and the mixture of the circuits is prevented. The device identification code information can be stored within a nonvolatile storage element. As the nonvolatile storage element, a nonvolatile memory or a fuse is used.
Such a nonvolatile memory can be used when the semiconductor integrated circuit includes a nonvolatile memory area like a FLASH memory. However, the fuse is used for a volatile memory such as a DRAM and an SRAM without the nonvolatile memory, or for a general semiconductor integrated circuit.
FIG. 4 shows a flow of reading conventional device identification code information from a fuse. The device identification code information is written and stored into the fuse acting as a nonvolatile storage element, and the fuse state is read as fuse information. In response to a command signal for reading fuse information, a storage state of the fuse is output as the fuse information to a fuse peripheral circuit. The fuse peripheral circuit is activated in response to the command signal to read and output the fuse information to an input/output circuit. The input/output circuit outputs the device identification code information. Thus, by reading the device identification code information, the semiconductor integrated circuits are identified and are individually specified.
However, the fuse which is used for the semiconductor integrated circuit is free from a protective coating (polyimide film) for protecting an internal circuit. In other words, such a protective coating film is opened at the fuse. Therefore, the fuse is inferior to the internal circuit in reliability. In addition, a fuse part of the fuse circuit uses a device area for a function thereof, and the device size increases due to presence of the fuse. Obviously, test processing for sorting a wafer requires cutting of the fuse, and time for cutting the fuse is also necessary. As a consequence, investment for a facility of cutting the fuse and the test time for sorting are needed. Further, there is a problem of lowering a yield due to a cutting mistake of the fuse. Thus, using a fuse brings about an increase of costs in the semiconductor integrated circuit.
The following documents are disclosed on the device identification-code-information circuit used for the semiconductor integrated circuit. Japanese Unexamined Patent Application Publication No. 2006-196159 (Reference 1) discloses a technology in which each chip of a multi-chip package has a fuse that stores device identification information. Each chip is selected by a control signal, and the device identification information is read. Japanese Unexamined Patent Application Publication No. 2001-101891 (Reference 2) discloses a technology in which input/output buffers are switched in a normal mode and a redundancy mode.
Japanese Unexamined Patent Application Publication No. 2000-206197 (Reference 3) discloses a technology in which a normal operation mode and a terminal test mode are set with a control signal. Japanese Unexamined Patent Application Publication No. 2005-209230 (Reference 4) discloses a technology in which a peripheral-equipment control unit is equipped and low power consumption of a peripheral device is accomplished by activation-start detecting means and activation-end detecting means.